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Texas Instruments /MSP432P4111 /TIMER_A0 /TAxCTL

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Interpret as TAxCTL

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15 1211 87 43 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (TAIFG_0)TAIFG 0 (TAIE_0)TAIE 0 (TACLR)TACLR 0 (MC_0)MC0 (ID_0)ID0 (TASSEL_0)TASSEL

TASSEL=TASSEL_0, TAIE=TAIE_0, MC=MC_0, ID=ID_0, TAIFG=TAIFG_0

Description

TimerAx Control Register

Fields

TAIFG

TimerA interrupt flag

0 (TAIFG_0): No interrupt pending

1 (TAIFG_1): Interrupt pending
TAIE

TimerA interrupt enable

0 (TAIE_0): Interrupt disabled

1 (TAIE_1): Interrupt enabled
TACLR

TimerA clear
MC

Mode control

0 (MC_0): Stop mode: Timer is halted

1 (MC_1): Up mode: Timer counts up to TAxCCR0

2 (MC_2): Continuous mode: Timer counts up to 0FFFFh

3 (MC_3): Up/down mode: Timer counts up to TAxCCR0 then down to 0000h
ID

Input divider

0 (ID_0): /1

1 (ID_1): /2

2 (ID_2): /4

3 (ID_3): /8
TASSEL

TimerA clock source select

0 (TASSEL_0): TAxCLK

1 (TASSEL_1): ACLK

2 (TASSEL_2): SMCLK

3 (TASSEL_3): INCLK

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Register License

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data